Xeon Phi

Results: 83



#Item
41Development Case Study Intel® C++ Composer XE Realtime superresolution program Intel® C++ Composer XE and Intel® Xeon Phi™ Coprocessors:

Development Case Study Intel® C++ Composer XE Realtime superresolution program Intel® C++ Composer XE and Intel® Xeon Phi™ Coprocessors:

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Source URL: software.intel.com

Language: English - Date: 2013-04-01 11:52:19
    42S O LU T I O N B R I E F Intel® Xeon Phi™ Coprocessor More than Double the Performance1,2 for Structural Mechanics Simulations Combine ANSYS Mechanical with the Intel® Xeon Phi™ coprocessor for dramatic

    S O LU T I O N B R I E F Intel® Xeon Phi™ Coprocessor More than Double the Performance1,2 for Structural Mechanics Simulations Combine ANSYS Mechanical with the Intel® Xeon Phi™ coprocessor for dramatic

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    Source URL: www.colfax-intl.com

    Language: English - Date: 2015-03-13 02:12:00
      43Delft University of Technology Parallel and Distributed Systems Report Series Identifying the Key Features of Intel Xeon Phi: A Comparative Approach Jianbin Fang, Ana Lucia Varbanescu, Henk Sips

      Delft University of Technology Parallel and Distributed Systems Report Series Identifying the Key Features of Intel Xeon Phi: A Comparative Approach Jianbin Fang, Ana Lucia Varbanescu, Henk Sips

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      Source URL: www.pds.ewi.tudelft.nl

      Language: English - Date: 2013-07-02 04:00:28
        44Colfax International Announces Developer Training for Intel® Xeon Phi™ Coprocessor Industry First Training Program Developed in Consultation with Intel SUNNYVALE, CA, Nov 8, 2012 – Colfax International, a leading pr

        Colfax International Announces Developer Training for Intel® Xeon Phi™ Coprocessor Industry First Training Program Developed in Consultation with Intel SUNNYVALE, CA, Nov 8, 2012 – Colfax International, a leading pr

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        Source URL: www.colfax-intl.com

        Language: English - Date: 2012-11-08 05:12:57
          45From Knights Corner to Knights Landing: Prepare for the Next Generation of Intel® Xeon Phi™ Technology Detect—and Correct—OpenMP* Inefficiencies Optimized Simulations for HPC in Biomedical Research

          From Knights Corner to Knights Landing: Prepare for the Next Generation of Intel® Xeon Phi™ Technology Detect—and Correct—OpenMP* Inefficiencies Optimized Simulations for HPC in Biomedical Research

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          Source URL: www.greymatter.com

          Language: English - Date: 2015-05-01 05:24:22
            46Programming and Optimization with Intel Xeon Phi Coprocessors Colfax Developer Training One-day Boot Camp Abstract: Colfax Developer Training (CDT) is an in-depth intensive

            Programming and Optimization with Intel Xeon Phi Coprocessors Colfax Developer Training One-day Boot Camp Abstract: Colfax Developer Training (CDT) is an in-depth intensive

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            Source URL: www.colfax-intl.com

            Language: English - Date: 2015-01-13 00:36:00
              47CASE STUDY Intel® Software Development Tools Intel® C /C++ Compiler, Intel® Fortran Compiler, Intel® MPI Library, Intel® Xeon Phi™ coprocessor AWE’s HPC Research Applications

              CASE STUDY Intel® Software Development Tools Intel® C /C++ Compiler, Intel® Fortran Compiler, Intel® MPI Library, Intel® Xeon Phi™ coprocessor AWE’s HPC Research Applications

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              Source URL: goparallel.sourceforge.net

              Language: English - Date: 2013-12-30 09:56:13
                48Intel® HPC Software Workshop SeriesHPC CODE MODERNISIERUNG für Intel® Xeon™ & Xeon Phi™ Mittwoch 6. Mai 2015 am LRZ

                Intel® HPC Software Workshop SeriesHPC CODE MODERNISIERUNG für Intel® Xeon™ & Xeon Phi™ Mittwoch 6. Mai 2015 am LRZ

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                Source URL: www.inteldevconference.com

                Language: English - Date: 2015-04-28 08:15:53
                49Offload Exercises: Option B (based on code examples used in presentation) Contents of README in offload_demos.tar: offload_demos.tar -- Introduction to Xeon Phi Explicit Offload ******************************************

                Offload Exercises: Option B (based on code examples used in presentation) Contents of README in offload_demos.tar: offload_demos.tar -- Introduction to Xeon Phi Explicit Offload ******************************************

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                Source URL: portal.tacc.utexas.edu

                Language: English - Date: 2013-12-02 17:16:43
                50Quick Start Guide Incorporation of MICs in Application Execution Goal - The compute nodes of Stampede incorporate 2 Sandy Bridge CPUs chips + (1 or 2) Xeon Phi chips. While the instruction sets of the CPU and Phi chips a

                Quick Start Guide Incorporation of MICs in Application Execution Goal - The compute nodes of Stampede incorporate 2 Sandy Bridge CPUs chips + (1 or 2) Xeon Phi chips. While the instruction sets of the CPU and Phi chips a

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                Source URL: portal.tacc.utexas.edu

                Language: English - Date: 2013-10-03 17:16:35